Product Summary
Power dissipation of the XC9572XL-10TQG100C in CPLDs can vary substantially depending on the system frequency, design application and output loading. To help reduce power dissipation, each macrocell in the XC9572XL-10TQG100C may be configured for low-power mode (from the default high-performance mode). In addition, unused product-terms and macrocells of the XC9572XL-10TQG100C are automatically deactivated by the software to further conserve power. This calculation was derived from laboratory measurements of an XC9572XL-10TQG100C part filled with 16-bit counters and allowing a single output (the LSB) to be enabled. The actual ICC value varies with the design application and should be verified during normal system operation.
Parametrics
XC9572XL-10TQG100C absolute maximum ratings: (1)VCC Supply voltage relative to GND: –0.5 to 4.0 V; (2)VIN Input voltage relative to GND(1): –0.5 to 5.5 V; (3)VTS Voltage applied to 3-state output(1): –0.5 to 5.5 V; (4)TSTG Storage temperature (ambient)(3): –65 to +150 ℃; (5)TJ Junction temperature: +150 ℃.
Features
XC9572XL-10TQG100C features: (1)5 ns pin-to-pin logic delays; (2)System frequency up to 178 MHz; (3)72 macrocells with 1,600 usable gates; (4)Available in small footprint packages; (5)Optimized for high-performance 3.3V systems; (6)Advanced system features; (7)Fast concurrent programming; (8)Slew rate control on individual outputs; (9)Enhanced data security features; (10)Excellent quality and reliability.
Diagrams
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XC9572XL-10TQG100C |
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