Product Summary
The CY7C1049DV33-10ZSXI is a high-performance CMOS Static RAM organized as 512K words by 8 bits. Easy memory expansion is provided by an active LOW Chip Enable (CE), an active LOW Output Enable (OE), and tri-state drivers. Writing to the CY7C1049DV33-10ZSXI is accomplished by taking Chip Enable (CE) and Write Enable (WE) inputs LOW. Data on the eight I/O pins (I/O0 through I/O7) is then written into the location specified on the address pins (A0 through A18). Reading from the CY7C1049DV33-10ZSXI is accomplished by taking Chip Enable (CE) and Output Enable (OE) LOW while forcing Write Enable (WE) HIGH. Under these conditions, the contents of the memory location specified by the address pins will appear on the I/O pins.
Parametrics
CY7C1049DV33-10ZSXI maximum ratings: (1)Storage Temperature: –65℃ to +150℃; (2)Ambient Temperature with; (3)Power Applied: –55℃ to +125℃; (4)Supply Voltage on VCC to Relative GND: –0.3V to +4.6V; (5)DC Voltage Applied to Outputs; (6)in High-Z State: –0.3V to VCC + 0.3V; (7)DC Input Voltage: –0.3V to VCC + 0.3V; (8)Current into Outputs (LOW): 20 mA; (9)Static Discharge Voltage >2001V; (10)Latch-up Current >200 mA.
Features
CY7C1049DV33-10ZSXI features: (1)Pin- and function-compatible with CY7C1049CV33; (2)High speed; (3)tAA = 10 ns; (4)Low active power; (5)ICC = 90 mA @ 10 ns (Industrial); (6)Low CMOS standby power; (7)ISB2 = 10 mA; (8)2.0V data retention; (9)Automatic power-down when deselected; (10)TTL-compatible inputs and outputs; (11)Easy memory expansion with CE and OE features; (12)Available in Lead-Free 36-lead (400-mil) Molded SOJ V36 and 44-pin TSOP II ZS44 packages.
Diagrams
Image | Part No | Mfg | Description | Pricing (USD) |
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CY7C1049DV33-10ZSXI |
Cypress Semiconductor |
SRAM 4M FAST ASYNC HI SPD IND |
Data Sheet |
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CY7C1049DV33-10ZSXIT |
Cypress Semiconductor |
SRAM 4M FAST ASYNC HI SPD IND |
Data Sheet |
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